mirror of
https://github.com/danbulant/Cosmos
synced 2026-05-19 12:30:32 +00:00
143 lines
No EOL
5.4 KiB
C#
143 lines
No EOL
5.4 KiB
C#
using System;
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using CPUx86 = Cosmos.Assembler.x86;
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using Cosmos.Assembler.x86;
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namespace Cosmos.IL2CPU.X86.IL
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{
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[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Sub)]
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public class Sub: ILOp
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{
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public Sub(Cosmos.Assembler.Assembler aAsmblr)
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: base(aAsmblr)
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{
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}
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public override void Execute(MethodInfo aMethod, ILOpCode aOpCode)
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{
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var xStackTop = aOpCode.StackPopTypes[0];
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var xStackTop2 = aOpCode.StackPopTypes[0];
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var xStackTopSize = SizeOfType(xStackTop);
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var xStackTop2Size = SizeOfType(xStackTop2);
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if (xStackTopSize != xStackTop2Size)
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{
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throw new Exception("Different size for substract: " + aMethod.MethodBase + "!");
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}
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var xStackTopIsFloat = TypeIsFloat(xStackTop);
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switch (xStackTopSize)
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{
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case 1:
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case 2:
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case 4:
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if (xStackTopIsFloat)
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{
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new CPUx86.SSE.MoveSS
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{
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DestinationReg = CPUx86.Registers.XMM0,
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SourceReg = CPUx86.Registers.ESP,
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SourceIsIndirect = true
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};
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new CPUx86.Add
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{
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DestinationReg = CPUx86.Registers.ESP,
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SourceValue = 4
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};
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new CPUx86.SSE.MoveSS
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{
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DestinationReg = CPUx86.Registers.XMM1,
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SourceReg = CPUx86.Registers.ESP,
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SourceIsIndirect = true
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};
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new CPUx86.SSE.SubSS
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{
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DestinationReg = CPUx86.Registers.XMM1,
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SourceReg = CPUx86.Registers.XMM0
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};
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new CPUx86.SSE.MoveSS
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{
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DestinationReg = CPUx86.Registers.ESP,
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DestinationIsIndirect = true,
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SourceReg = CPUx86.Registers.XMM1
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};
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}
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else
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{
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new CPUx86.Pop
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{
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DestinationReg = CPUx86.Registers.ECX
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};
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new CPUx86.Pop
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{
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DestinationReg = CPUx86.Registers.EAX
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};
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new CPUx86.Sub
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{
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DestinationReg = CPUx86.Registers.EAX,
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SourceReg = CPUx86.Registers.ECX
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};
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new CPUx86.Push
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{
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DestinationReg = CPUx86.Registers.EAX
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};
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}
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break;
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case 8:
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if (xStackTopIsFloat)
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{
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new CPUx86.x87.FloatLoad
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{
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DestinationReg = Registers.ESP,
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Size = 64,
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DestinationIsIndirect = true,
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DestinationDisplacement = 8
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};
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new CPUx86.x87.FloatSub
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{
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DestinationReg = CPUx86.Registers.ESP,
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DestinationIsIndirect = true,
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Size = 64
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};
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new CPUx86.Add
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{
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SourceValue = 8,
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DestinationReg = Registers.ESP
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};
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new CPUx86.x87.FloatStoreAndPop
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{
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DestinationReg = Registers.ESP,
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Size = 64,
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DestinationIsIndirect = true
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};
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}
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else
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{
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new CPUx86.Pop
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{
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DestinationReg = CPUx86.Registers.EAX
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};
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new CPUx86.Pop
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{
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DestinationReg = CPUx86.Registers.EDX
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};
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new CPUx86.Sub
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{
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DestinationReg = CPUx86.Registers.ESP,
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DestinationIsIndirect = true,
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SourceReg = CPUx86.Registers.EAX
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};
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new CPUx86.SubWithCarry
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{
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DestinationReg = CPUx86.Registers.ESP,
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DestinationIsIndirect = true,
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DestinationDisplacement = 4,
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SourceReg = CPUx86.Registers.EDX
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};
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}
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break;
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default:
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throw new NotImplementedException("not implemented");
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}
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}
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}
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} |