mirror of
https://github.com/danbulant/Cosmos
synced 2026-05-30 04:40:14 +00:00
change StackContents to uint, able to use now mnemoric with 3 operands, shl IL near 64 bit (unknown error), add asm line to nasm error
57 lines
No EOL
2.3 KiB
C#
57 lines
No EOL
2.3 KiB
C#
using System;
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using CPUx86 = Cosmos.Compiler.Assembler.X86;
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using Cosmos.Compiler.Assembler.X86;
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namespace Cosmos.IL2CPU.X86.IL
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{
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/// <summary>
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/// Convert top Stack element to UInt64 and change its type to Int64.
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/// </summary>
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[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_U8)]
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public class Conv_U8: ILOp
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{
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public Conv_U8(Cosmos.Compiler.Assembler.Assembler aAsmblr):base(aAsmblr)
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{
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}
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public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
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var xSource = Assembler.Stack.Pop();
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switch( xSource.Size )
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{
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case 1:
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case 2:
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case 4:
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{
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if (xSource.IsFloat)
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{
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new CPUx86.x87.FloatLoad { DestinationReg = Registers.ESP, Size = 32, DestinationIsIndirect = true };
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new CPUx86.x87.FloatABS();
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new CPUx86.x87.FloatRound();
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new CPUx86.x87.FloatStore { DestinationReg = Registers.ESP, Size = 32, DestinationIsIndirect = true };
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}
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else
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{
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new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
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new CPUx86.Push { DestinationValue = 0 };
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new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
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}
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break;
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}
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case 8:
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{
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if (xSource.IsFloat)
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{
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new CPUx86.x87.FloatLoad { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true };
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new CPUx86.x87.FloatABS();
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new CPUx86.x87.FloatRound();
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new CPUx86.x87.FloatStore { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true };
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}
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break;
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}
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default:
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//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U8: SourceSize " + xSource + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
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throw new NotImplementedException();
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}
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Assembler.Stack.Push(8, typeof(UInt64));
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}
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}
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} |