Cosmos/source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_U1.cs
Trivalik_cp 7f84d28d69 add DOTNETCOMPABILE define condition,
change StackContents to uint,
able to use now mnemoric with 3 operands,
shl IL near 64 bit (unknown error),
add asm line to nasm error
2011-02-22 17:03:42 +00:00

58 lines
No EOL
2.2 KiB
C#

using System;
using CPUx86 = Cosmos.Compiler.Assembler.X86;
namespace Cosmos.IL2CPU.X86.IL
{
/// <summary>
/// Convert top Stack element to UInt8 and extends it to Int32.
/// </summary>
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Conv_U1 )]
public class Conv_U1 : ILOp
{
public Conv_U1( Cosmos.Compiler.Assembler.Assembler aAsmblr )
: base( aAsmblr )
{
}
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode )
{
var xSource = Assembler.Stack.Pop();
if (xSource.IsFloat)
{
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
switch( xSource.Size )
{
case 2:
case 4:
{
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break;
}
case 8:
{
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break;
}
case 1:
{
break;
}
default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I1: SourceSize " + xSource + " not supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException();
}
#if DOTNETCOMPATIBLE
Assembler.Stack.Push(4, typeof(byte));
#else
Assembler.Stack.Push(1, typeof(byte));
#endif
}
}
}