Cosmos/source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_I4.cs
Trivalik_cp 591e20c7ec add convertSD2SI, mov double dupplicate (without 64 bit support no other way found)
fix conv.i4 for case:    double k = 50.5; int k2 = (int)k;
2011-05-24 20:28:57 +00:00

58 lines
No EOL
2.3 KiB
C#

using System;
using CPUx86 = Cosmos.Compiler.Assembler.X86;
namespace Cosmos.IL2CPU.X86.IL
{
/// <summary>
/// Convert top Stack element to Int32.
/// </summary>
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Conv_I4 )]
public class Conv_I4 : ILOp
{
public Conv_I4( Cosmos.Compiler.Assembler.Assembler aAsmblr )
: base( aAsmblr )
{
}
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode )
{
var xSource = Assembler.Stack.Pop();
switch( xSource.Size )
{
case 1:
case 2:
case 4:
{
if (xSource.IsFloat)
{
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
break;
}
case 8:
{
if (xSource.IsFloat)
{
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SI { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break;
}
default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I4: SourceSize " + xSource + " not yet supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException();
}
Assembler.Stack.Push(4, typeof(Int32));
}
}
}