mirror of
https://github.com/danbulant/Cosmos
synced 2026-05-19 12:30:32 +00:00
309 lines
12 KiB
C#
309 lines
12 KiB
C#
using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Text;
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using Cosmos.Core.IOGroup;
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using Cosmos.Common.Extensions;
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using Cosmos.Debug.Kernel;
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namespace Cosmos.HAL
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{
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public class PCIDevice
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{
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public enum PCIHeaderType : byte
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{
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Normal = 0x00,
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Bridge = 0x01,
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Cardbus = 0x02
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}
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[Flags]
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public enum PCIBist : byte
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{
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CocdMask = 0x0f, /* Return result */
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Start = 0x40, /* 1 to start BIST, 2 secs or less */
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Capable = 0x80 /* 1 if BIST capable */
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}
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[Flags]
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public enum PCICommand : short
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{
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IO = 0x1, /* Enable response in I/O space */
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Memory = 0x2, /* Enable response in Memory space */
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Master = 0x4, /* Enable bus mastering */
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Special = 0x8, /* Enable response to special cycles */
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Invalidate = 0x10, /* Use memory write and invalidate */
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VGA_Pallete = 0x20, /* Enable palette snooping */
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Parity = 0x40, /* Enable parity checking */
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Wait = 0x80, /* Enable address/data stepping */
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SERR = 0x100, /* Enable SERR */
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Fast_Back = 0x200, /* Enable back-to-back writes */
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}
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[Flags]
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public enum PCIStatus : int
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{
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CAP_LIST = 0x10, /* Support Capability List */
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SUPPORT_66MHZ = 0x20, /* Support 66 Mhz PCI 2.1 bus */
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UDF = 0x40, /* Support User Definable Features [obsolete] */
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FAST_BACK = 0x80, /* Accept fast-back to back */
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PARITY = 0x100, /* Detected parity error */
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DEVSEL_MASK = 0x600, /* DEVSEL timing */
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DEVSEL_FAST = 0x000,
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DEVSEL_MEDIUM = 0x200,
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DEVSEL_SLOW = 0x400,
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SIG_TARGET_ABORT = 0x800, /* Set on target abort */
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REC_TARGET_ABORT = 0x1000, /* Master ack of " */
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REC_MASTER_ABORT = 0x2000, /* Set on master abort */
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SIG_SYSTEM_ERROR = 0x4000, /* Set when we drive SERR */
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DETECTED_PARITY = 0x8000 /* Set on parity error */
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}
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public enum PCIInterruptPIN : byte
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{
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None = 0x00,
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INTA = 0x01,
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INTB = 0x02,
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INTC = 0x03,
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INTD = 0x04
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}
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public ushort VendorID { get; private set; }
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public ushort DeviceID { get; private set; }
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//public PCICommand Command { get; private set; }
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//public PCIStatus Status { get; private set; }
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public PCICommand Command { get { return (PCICommand)ReadRegister16(0x04); } set { WriteRegister16(0x04, (ushort)value); } }
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public PCIStatus Status { get { return (PCIStatus)ReadRegister16(0x06); } set { WriteRegister16(0x06, (ushort)value); } }
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public byte RevisionID { get; private set; }
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public byte ProgIF { get; private set; }
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public byte Subclass { get; private set; }
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public byte ClassCode { get; private set; }
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public byte CacheLineSize { get; private set; }
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public byte LatencyTimer { get; private set; }
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public PCIHeaderType HeaderType { get; private set; }
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public PCIBist BIST { get; private set; }
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public byte InterruptLine { get; private set; }
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public PCIInterruptPIN InterruptPIN { get; private set; }
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public bool DeviceExists { get; private set; }
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/// <summary>
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/// Has this device been claimed by a driver
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/// </summary>
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public bool Claimed { get; set; }
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public uint bus = 0;
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public uint slot = 0;
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public uint function = 0;
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protected Core.IOGroup.PCI IO = new Core.IOGroup.PCI();
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public PCIDevice(uint bus, uint slot, uint function)
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{
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this.bus = bus;
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this.slot = slot;
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this.function = function;
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VendorID = ReadRegister16(0x00);
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DeviceID = ReadRegister16(0x02);
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//Command = (PCICommand)ReadRegister16(0x04);
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//Status = (PCIStatus)ReadRegister16(0x06);
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RevisionID = ReadRegister8(0x08);
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ProgIF = ReadRegister8(0x09);
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Subclass = ReadRegister8(0x0A);
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ClassCode = ReadRegister8(0x0B);
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CacheLineSize = ReadRegister8(0x0C);
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LatencyTimer = ReadRegister8(0x0D);
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HeaderType = (PCIHeaderType)ReadRegister8(0x0E);
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BIST = (PCIBist)ReadRegister8(0x0F);
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InterruptLine = ReadRegister8(0x3C);
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InterruptPIN = (PCIInterruptPIN)ReadRegister8(0x3D);
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DeviceExists = (uint)VendorID != 0xFFFF && (uint)DeviceID != 0xFFFF;
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}
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protected UInt32 GetAddressBase(uint aBus, uint aSlot, uint aFunction)
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{
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// 31 30 - 24 23 - 16 15 - 11 10 - 8 7 - 2 1 - 0
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// Enable Bit Reserved Bus Number Device Number Function Number Register Number 00
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return (UInt32)(
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// Enable bit - must be set
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0x80000000
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// Bits 23-16
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| (aBus << 16)
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// Bits 15-11
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| ((aSlot & 0x1F) << 11)
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// Bits 10-8
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| ((aFunction & 0x07) << 8));
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}
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public void EnableMemory(bool enable)
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{
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UInt16 command = ReadRegister16(0x04);
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UInt16 flags = 0x0007;
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if (enable)
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command |= flags;
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else
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command &= (ushort)~flags;
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WriteRegister16(0x04, command);
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}
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#region IOReadWrite
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protected byte ReadRegister8(byte aRegister)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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return (byte)(IO.ConfigDataPort.DWord >> ((aRegister % 4) * 8) & 0xFF);
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}
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protected void WriteRegister8(byte aRegister, byte value)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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IO.ConfigDataPort.Byte = value;
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}
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protected UInt16 ReadRegister16(byte aRegister)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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return (UInt16)(IO.ConfigDataPort.DWord >> ((aRegister % 4) * 8) & 0xFFFF); ;
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}
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protected void WriteRegister16(byte aRegister, ushort value)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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IO.ConfigDataPort.Word = value;
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}
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protected UInt32 ReadRegister32(byte aRegister)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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return IO.ConfigDataPort.DWord;
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}
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protected void WriteRegister32(byte aRegister, uint value)
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{
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UInt32 xAddr = GetAddressBase(bus, slot, function) | ((UInt32)(aRegister & 0xFC));
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IO.ConfigAddressPort.DWord = xAddr;
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IO.ConfigDataPort.DWord = value;
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}
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#endregion
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public class DeviceClass
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{
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public static string GetString(PCIDevice device)
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{
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switch (device.VendorID)
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{
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case 0x1022: //AMD
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switch (device.DeviceID)
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{
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case 0x2000:
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return "AMD PCnet LANCE PCI Ethernet Controller";
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}
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break;
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case 0x104B: //Sony
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switch (device.DeviceID)
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{
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case 0x1040:
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return "Mylex BT958 SCSI Host Adaptor";
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}
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break;
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case 0x1274: //Ensoniq
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switch (device.DeviceID)
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{
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case 0x1371:
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return "Ensoniq AudioPCI";
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}
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break;
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case 0x15AD: //VMware
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switch (device.DeviceID)
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{
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case 0x0405:
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return "VMware NVIDIA 9500MGS";
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case 0x0770:
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return "VMware Standard Enhanced PCI to USB Host Controller";
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case 0x0790:
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return "VMware 6.0 Virtual USB 2.0 Host Controller";
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case 0x07A0:
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return "VMware PCI Express Root Port";
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}
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break;
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case 0x8086: //Intel
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switch (device.DeviceID)
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{
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case 0x7190:
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return "Intel 440BX/ZX AGPset Host Bridge";
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case 0x7191:
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return "Intel 440BX/ZX AGPset PCI-to-PCI bridge";
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case 0x7110:
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return "Intel PIIX4/4E/4M ISA Bridge";
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case 0x7112:
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return "Intel PIIX4/4E/4M USB Interface";
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}
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break;
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}
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switch (device.ClassCode)
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{
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//case 0x00:
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// return "Any device";
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case 0x01:
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return "Mass Storage Controller";
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case 0x02:
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return "Network Controller";
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case 0x03:
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return "Display Controller";
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case 0x04:
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return "Multimedia Controller";
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case 0x05:
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return "Memory Controller";
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case 0x06:
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return "Bridge Device";
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case 0x07:
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return "Simple Communication Controller";
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case 0x08:
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return "Base System Peripheral";
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case 0x09:
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return "Input Device";
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case 0x0A:
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return "Docking Station";
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case 0x0B:
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return "Processor";
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case 0x0C:
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return "Serial Bus Controller";
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case 0x0D:
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return "Wireless Controller";
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case 0x0E:
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return "Intelligent I/O Controller";
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case 0x0F:
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return "Satellite Communication Controller";
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case 0x10:
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return "Encryption/Decryption Controller";
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case 0x11:
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return "Data Acquisition and Signal Processing Controller";
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//case 0xFF:
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// return "Unkown device";
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}
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return "ClassCode: " + device.ClassCode + " Subclass: " + device.Subclass + " ProgIF: " + device.ProgIF;
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}
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}
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private static string ToHex(uint aNumber, byte aBits)
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{
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return "0x" + aNumber.ToHex(aBits / 4);
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}
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}
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}
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