Cosmos/source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Rem.cs
Trivalik_cp 7f84d28d69 add DOTNETCOMPABILE define condition,
change StackContents to uint,
able to use now mnemoric with 3 operands,
shl IL near 64 bit (unknown error),
add asm line to nasm error
2011-02-22 17:03:42 +00:00

66 lines
No EOL
3.4 KiB
C#

using System;
using CPUx86 = Cosmos.Compiler.Assembler.X86;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Rem)]
public class Rem: ILOp
{
public Rem(Cosmos.Compiler.Assembler.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
var xStackItem = Assembler.Stack.Pop();
var xSize = Math.Max(xStackItem.Size, Assembler.Stack.Pop().Size);
if( xSize > 4 )
{
if (xStackItem.IsFloat)
{
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 8 };
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM1, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.XorPS { DestinationReg = CPUx86.Registers.XMM2, SourceReg = CPUx86.Registers.XMM2 };
new CPUx86.SSE.DivPS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.XMM1 };
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.XMM2, DestinationReg = CPUx86.Registers.ESP, DestinationIsIndirect = true };
}
else
{
new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; // gets devised by ecx
new CPUx86.Xor { DestinationReg = CPUx86.Registers.EDX, SourceReg = CPUx86.Registers.EDX };
new CPUx86.Divide { DestinationReg = CPUx86.Registers.ECX }; // => EAX / ECX
new CPUx86.Push { DestinationReg = CPUx86.Registers.EDX };
}
}
else
{
if (xStackItem.IsFloat)
{
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM1, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.SSE.XorPS { DestinationReg = CPUx86.Registers.XMM2, SourceReg = CPUx86.Registers.XMM2 };
new CPUx86.SSE.DivSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.XMM1 };
new CPUx86.Sub { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.XMM2, DestinationReg = CPUx86.Registers.ESP, DestinationIsIndirect = true };
}
else
{
new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; // gets devised by ecx
new CPUx86.Xor { DestinationReg = CPUx86.Registers.EDX, SourceReg = CPUx86.Registers.EDX };
new CPUx86.Divide { DestinationReg = CPUx86.Registers.ECX }; // => EAX / ECX
new CPUx86.Push { DestinationReg = CPUx86.Registers.EDX };
}
}
Assembler.Stack.Push( xStackItem );
}
}
}