LostTheBlack_cp
c2cf1cefcb
[+] Every instruction supports converting to FASM code now.
2008-04-11 10:24:33 +00:00
LostTheBlack_cp
735f4ac04c
[*] small code improvement
2008-04-09 11:17:04 +00:00
LostTheBlack_cp
ad77460ba8
[+] push and pop instructions passed tests.
...
[*] ModRM, Rex & SIB code is refactored slightly.
2008-04-09 09:22:12 +00:00
LostTheBlack_cp
7a17688f08
[+] Alu dest<-source instructions are almost complete (at least I've no tests that fail)
2008-04-08 16:44:05 +00:00
LostTheBlack_cp
145bd67a19
[+] Almost done alu instructions
2008-04-08 13:52:11 +00:00
LostTheBlack_cp
88a7ee78f3
[+] Rip-based addressing (not tested, no checks) in my assembler
2008-04-05 18:44:10 +00:00
LostTheBlack_cp
d382dfbdc8
[+] Added some mnemonics for registers.
...
[+] Immediate operand instantination.
2008-03-31 11:26:30 +00:00
LostTheBlack_cp
caa4ba3e83
[+] Adc code generation passed some tests. (Reg, Mem and Reg,Reg still not supported)
2008-03-31 11:13:45 +00:00
LostTheBlack_cp
09c5863060
[+] Source Dest operators emitter are almost ready.
2008-03-31 10:03:31 +00:00
LostTheBlack_cp
498f293c8a
Added OO-based basic parts of AMD64 jitter:
...
[+] Registers enumeration (only GPRs)
[+] Basic class ProcessorInstruction
[+] Base class InstructionOperand it's child GeneralPurposeRegister
[+] Added some abstraction to DestSourceInstruction
[+] Added stub for first instruction - AddWithCarry
2008-03-31 06:59:34 +00:00
