dan/Cosmos
1
0
Fork 0
mirror of https://github.com/danbulant/Cosmos synced 2026-05-22 22:09:12 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

Browse source
This commit is contained in:
gero_cp 2009-08-24 10:35:55 +00:00
parent 596ebc37b8
commit f3ee0a8dc6
7 changed files with 74 additions and 460 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
source2/IL2PCU/Cosmos.IL2CPU.X86/Cosmos.IL2CPU.X86.csproj
View file

@ -59,11 +59,6 @@
<Compile Include="IL\And.cs" />
<Compile Include="IL\Arglist.cs" />
<Compile Include="IL\Branch.cs" />
<Compile Include="IL\Bge_Un.cs" />
<Compile Include="IL\Bgt_Un.cs" />
<Compile Include="IL\Ble_Un.cs" />
<Compile Include="IL\Blt_Un.cs" />
<Compile Include="IL\Bne_Un.cs" />
<Compile Include="IL\Box.cs" />
<Compile Include="IL\Br.cs" />
<Compile Include="IL\Break.cs" />
@ -113,6 +108,7 @@
<Compile Include="IL\Conv_U2.cs" />
<Compile Include="IL\Conv_U4.cs" />
<Compile Include="IL\Conv_U8.cs" />
<Compile Include="IL\Branch_Un.cs" />
<Compile Include="IL\Cpblk.cs" />
<Compile Include="IL\Cpobj.cs" />
<Compile Include="IL\Div.cs" />

84
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Bge_Un.cs
View file

@ -1,84 +0,0 @@
using System;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Bge_Un)]
public class Bge_Un: ILOp
{
public Bge_Un(Cosmos.IL2CPU.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
//TODO: Implement this Op
//TODO: Merge these like Branch if possible, ie Branch_Un
}
// using System;
// using System.IO;
//
//
// using CPU = Indy.IL2CPU.Assembler;
// using CPUx86 = Indy.IL2CPU.Assembler.X86;
//
// namespace Indy.IL2CPU.IL.X86 {
// [OpCode(OpCodeEnum.Bge_Un)]
// public class Bge_Un: Op {
// public readonly string TargetLabel;
// public readonly string CurInstructionLabel;
// private string mNextLabel;
// private string mCurLabel;
// private uint mCurOffset;
// private MethodInformation mMethodInformation;
// public Bge_Un(ILReader aReader, MethodInformation aMethodInfo)
// : base(aReader, aMethodInfo) {
// TargetLabel = GetInstructionLabel(aReader.OperandValueBranchPosition);
// CurInstructionLabel = GetInstructionLabel(aReader);
// mMethodInformation = aMethodInfo;
// mCurOffset = aReader.Position;
// mCurLabel = IL.Op.GetInstructionLabel(aReader);
// mNextLabel = IL.Op.GetInstructionLabel(aReader.NextPosition);
// }
// public override void DoAssemble() {
// if (Assembler.StackContents.Peek().IsFloat) {
// EmitNotSupportedException(Assembler, GetServiceProvider(), "Floats are not yet supported (Bge)", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// int xSize = Math.Max(Assembler.StackContents.Pop().Size, Assembler.StackContents.Pop().Size);
// if (xSize > 8) {
// EmitNotSupportedException(Assembler, GetServiceProvider(), "StackSize>8 not supported (Bge)", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// string BaseLabel = CurInstructionLabel + "__";
// string LabelTrue = BaseLabel + "True";
// string LabelFalse = BaseLabel + "False";
// if (xSize > 4)
// {
// new CPUx86.Pop{DestinationReg = CPUx86.Registers.EAX};
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EDX };
// //value2: EDX:EAX
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// //value1: ECX:EBX
// new CPUx86.Sub { DestinationReg = CPUx86.Registers.EBX, SourceReg = CPUx86.Registers.EAX };
// new CPUx86.SubWithCarry { DestinationReg = CPUx86.Registers.ECX, SourceReg = CPUx86.Registers.EDX };
// //result = value1 - value2
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.GreaterThanOrEqualTo, DestinationLabel = TargetLabel };
// } else {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Compare { DestinationReg = CPUx86.Registers.EAX, SourceReg=CPUx86.Registers.ESP, SourceIsIndirect=true};
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.GreaterThanOrEqualTo, DestinationLabel = LabelFalse };
// new CPUx86.Jump { DestinationLabel = LabelTrue };
// new CPU.Label(LabelTrue);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// new CPUx86.Jump { DestinationLabel = TargetLabel };
// new CPU.Label(LabelFalse);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// }
// }
// }
// }
}
}

97
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Bgt_Un.cs
View file

@ -1,97 +0,0 @@
using System;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Bgt_Un)]
public class Bgt_Un: ILOp
{
public Bgt_Un(Cosmos.IL2CPU.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
//TODO: Implement this Op
}
// using System;
// using System.IO;
//
//
// using CPU = Indy.IL2CPU.Assembler;
// using CPUx86 = Indy.IL2CPU.Assembler.X86;
//
// namespace Indy.IL2CPU.IL.X86 {
// [OpCode(OpCodeEnum.Bgt_Un)]
// public class Bgt_Un: Op {
// public readonly string TargetLabel;
// public readonly string CurInstructionLabel;
// private string mNextLabel;
// private string mCurLabel;
// private uint mCurOffset;
// private MethodInformation mMethodInformation;
//
// public Bgt_Un(ILReader aReader, MethodInformation aMethodInfo)
// : base(aReader, aMethodInfo) {
// TargetLabel = GetInstructionLabel(aReader.OperandValueBranchPosition);
// CurInstructionLabel = GetInstructionLabel(aReader);
// mMethodInformation = aMethodInfo;
// mCurOffset = aReader.Position;
// mCurLabel = IL.Op.GetInstructionLabel(aReader);
// mNextLabel = IL.Op.GetInstructionLabel(aReader.NextPosition);
// }
// public override void DoAssemble() {
// if (Assembler.StackContents.Peek().IsFloat)
// {
// EmitNotSupportedException(Assembler, GetServiceProvider(), "Floats not yet supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// var rightTop = Assembler.StackContents.Pop();
// var leftBottom = Assembler.StackContents.Pop();
// int xSize = Math.Max(rightTop.Size, leftBottom.Size);
// if (xSize > 8)
// {
// EmitNotSupportedException(Assembler, GetServiceProvider(), "StackSize>8 not supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
//
// string BaseLabel = CurInstructionLabel + "__";
// string LabelTrue = BaseLabel + "True";
// string LabelFalse = BaseLabel + "False";
//
// if (xSize <= 4)
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Compare{DestinationReg=CPUx86.Registers.EAX, SourceReg=CPUx86.Registers.ESP, SourceIsIndirect=true};
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.Below, DestinationLabel = LabelTrue };
// new CPUx86.Jump { DestinationLabel = LabelFalse };
// new CPU.Label(LabelTrue);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// new CPUx86.Jump { DestinationLabel = TargetLabel };
// new CPU.Label(LabelFalse);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// return;
// }
//
// if (xSize == 8)
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EDX };
// //value2: EDX:EAX
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// //value1: ECX:EBX
// new CPUx86.Sub { DestinationReg = CPUx86.Registers.EBX, SourceReg = CPUx86.Registers.EAX };
// new CPUx86.SubWithCarry { DestinationReg = CPUx86.Registers.ECX, SourceReg = CPUx86.Registers.EDX };
// //result = value1 - value2
// new CPUx86.ConditionalJump{Condition=CPUx86.ConditionalTestEnum.Above,DestinationLabel = TargetLabel };
// return;
// }
//
// throw new NotSupportedException();
// }
// }
// }
}
}

88
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Ble_Un.cs
View file

@ -1,88 +0,0 @@
using System;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Ble_Un)]
public class Ble_Un: ILOp
{
public Ble_Un(Cosmos.IL2CPU.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
//TODO: Implement this Op
}
// using System;
// using System.IO;
//
//
// using CPU = Indy.IL2CPU.Assembler;
// using CPUx86 = Indy.IL2CPU.Assembler.X86;
// using Indy.IL2CPU.Assembler;
//
// namespace Indy.IL2CPU.IL.X86 {
// [OpCode(OpCodeEnum.Ble_Un)]
// public class Ble_Un: Op {
// public readonly string TargetLabel;
// public readonly string CurInstructionLabel;
// private string mNextLabel;
// private string mCurLabel;
// private uint mCurOffset;
// private MethodInformation mMethodInformation;
// public Ble_Un(ILReader aReader, MethodInformation aMethodInfo)
// : base(aReader, aMethodInfo) {
// TargetLabel = GetInstructionLabel(aReader.OperandValueBranchPosition);
// CurInstructionLabel = GetInstructionLabel(aReader);
// mMethodInformation = aMethodInfo;
// mCurOffset = aReader.Position;
// mCurLabel = IL.Op.GetInstructionLabel(aReader);
// mNextLabel = IL.Op.GetInstructionLabel(aReader.NextPosition);
// }
// public override void DoAssemble() {
// StackContent xItem1 = Assembler.StackContents.Pop();
// StackContent xItem2 = Assembler.StackContents.Pop();
// int xSize = Math.Max(xItem1.Size, xItem2.Size);
// var xIsFloat = xItem1.IsFloat || xItem2.IsFloat;
// if (xIsFloat) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Ble_Un: Float support not yet implemented!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// if (xSize > 8) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Ble_Un: StackSize>8 not supported yet!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// string BaseLabel = CurInstructionLabel + "__";
// string LabelTrue = BaseLabel + "True";
// string LabelFalse = BaseLabel + "False";
// if (xSize > 4)
// {
// new CPUx86.Pop{DestinationReg = CPUx86.Registers.EAX};
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EDX };
// //value2: EDX:EAX
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// //value1: ECX:EBX
// new CPUx86.Sub { DestinationReg = CPUx86.Registers.EBX, SourceReg = CPUx86.Registers.EAX };
// new CPUx86.SubWithCarry { DestinationReg = CPUx86.Registers.ECX, SourceReg = CPUx86.Registers.EDX };
// //result = value1 - value2
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.BelowOrEqual, DestinationLabel = TargetLabel };
// } else
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; ;
// new CPUx86.Compare { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.LessThanOrEqualTo, DestinationLabel = LabelFalse };
// new CPUx86.Jump { DestinationLabel = LabelTrue };
// new CPU.Label(LabelTrue);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// new CPUx86.Jump { DestinationLabel = TargetLabel };
// new CPU.Label(LabelFalse);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// }
// }
// }
// }
}
}

102
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Blt_Un.cs
View file

@ -1,102 +0,0 @@
using System;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Blt_Un)]
public class Blt_Un: ILOp
{
public Blt_Un(Cosmos.IL2CPU.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
//TODO: Implement this Op
}
// using System;
// using System.IO;
//
//
// using CPU = Indy.IL2CPU.Assembler;
// using CPUx86 = Indy.IL2CPU.Assembler.X86;
//
// namespace Indy.IL2CPU.IL.X86 {
// [OpCode(OpCodeEnum.Blt_Un)]
// public class Blt_Un: Op {
// public readonly string TargetLabel;
// public readonly string CurInstructionLabel;
// private string mNextLabel;
// private string mCurLabel;
// private uint mCurOffset;
// private MethodInformation mMethodInformation;
// public Blt_Un(ILReader aReader, MethodInformation aMethodInfo)
// : base(aReader, aMethodInfo) {
// TargetLabel = GetInstructionLabel(aReader.OperandValueBranchPosition);
// CurInstructionLabel = GetInstructionLabel(aReader);
// mMethodInformation = aMethodInfo;
// mCurOffset = aReader.Position;
// mCurLabel = IL.Op.GetInstructionLabel(aReader);
// mNextLabel = IL.Op.GetInstructionLabel(aReader.NextPosition);
// }
// public override void DoAssemble() {
// if (Assembler.StackContents.Peek().IsFloat) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Blt_Un: Floats are not yet supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// var rightTop = Assembler.StackContents.Pop();
// var leftBottom = Assembler.StackContents.Pop();
// int xSize = Math.Max(rightTop.Size, leftBottom.Size);
// if (xSize > 8) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Blt_Un: StackSize>8 not supported yet", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// string BaseLabel = CurInstructionLabel + "__";
// string LabelTrue = BaseLabel + "True";
// string LabelFalse = BaseLabel + "False";
// if (xSize <= 4)
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// //if (xSize > 4)
// //{
// // throw new NotImplementedException("long comprasion is not implemented");
// // new CPUx86.Add("esp", "4");
// //}
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// //if (xSize > 4)
// //{
// // throw new NotImplementedException("long comprasion is not implemented");
// // new CPUx86.Add("esp", "4");
// //}
// new CPUx86.Push { DestinationReg = CPUx86.Registers.ECX };
// new CPUx86.Compare { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.LessThan, DestinationLabel = LabelTrue };
// new CPUx86.Jump { DestinationLabel = LabelFalse };
// new CPU.Label(LabelTrue);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// new CPUx86.Jump { DestinationLabel = TargetLabel };
// new CPU.Label(LabelFalse);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue=4 };
// return;
// }
//
// if (xSize == 8)
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Pop{DestinationReg = CPUx86.Registers.EDX};
// //value2: EDX:EAX
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// //value1: ECX:EBX
// new CPUx86.Sub { DestinationReg = CPUx86.Registers.EBX, SourceReg = CPUx86.Registers.EAX };
// new CPUx86.SubWithCarry { DestinationReg = CPUx86.Registers.ECX, SourceReg = CPUx86.Registers.EDX };
// //result = value1 - value2
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.Below, DestinationLabel = TargetLabel };
// }
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Blt_Un: Circumstances not supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// }
// }
// }
}
}

84
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Bne_Un.cs
View file

@ -1,84 +0,0 @@
using System;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Bne_Un)]
public class Bne_Un: ILOp
{
public Bne_Un(Cosmos.IL2CPU.Assembler aAsmblr):base(aAsmblr)
{
}
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) {
//TODO: Implement this Op
}
// using System;
// using System.IO;
//
//
// using CPU = Indy.IL2CPU.Assembler;
// using CPUx86 = Indy.IL2CPU.Assembler.X86;
//
// namespace Indy.IL2CPU.IL.X86 {
// [OpCode(OpCodeEnum.Bne_Un)]
// public class Bne_Un: Op {
// public readonly string TargetLabel;
// public readonly string CurInstructionLabel;
// private string mNextLabel;
// private string mCurLabel;
// private uint mCurOffset;
// private MethodInformation mMethodInformation;
// public Bne_Un(ILReader aReader, MethodInformation aMethodInfo)
// : base(aReader, aMethodInfo) {
// TargetLabel = GetInstructionLabel(aReader.OperandValueBranchPosition);
// CurInstructionLabel = GetInstructionLabel(aReader);
// mMethodInformation = aMethodInfo;
// mCurOffset = aReader.Position;
// mCurLabel = IL.Op.GetInstructionLabel(aReader);
// mNextLabel = IL.Op.GetInstructionLabel(aReader.NextPosition);
// }
// public override void DoAssemble() {
// if (Assembler.StackContents.Peek().IsFloat) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Bne_Un: Float support not yet implemented!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// int xSize = Math.Max(Assembler.StackContents.Pop().Size, Assembler.StackContents.Pop().Size);
// if (xSize > 8) {
// EmitNotImplementedException(Assembler, GetServiceProvider(), "Bne_Un: StackSize>8 not supported yet", mCurLabel, mMethodInformation, mCurOffset, mNextLabel);
// return;
// }
// string BaseLabel = CurInstructionLabel + "__";
// string LabelTrue = BaseLabel + "True";
// string LabelFalse = BaseLabel + "False";
// if (xSize > 4)
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
// //value2 = EBX:EAX
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EDX };
// //value1 = EDX:ECX
// new CPUx86.Xor { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.ECX };
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.NotZero, DestinationLabel = TargetLabel };
// new CPUx86.Xor { DestinationReg = CPUx86.Registers.EBX, SourceReg = CPUx86.Registers.EDX };
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.NotZero, DestinationLabel = TargetLabel };
// } else
// {
// new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
// new CPUx86.Compare { DestinationReg = CPUx86.Registers.EAX, SourceReg=CPUx86.Registers.ESP, SourceIsIndirect=true};
// new CPUx86.ConditionalJump { Condition = CPUx86.ConditionalTestEnum.Equal, DestinationLabel = LabelTrue };
// new CPUx86.Jump { DestinationLabel = LabelFalse };
// new CPU.Label(LabelFalse);
// new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
// new CPUx86.Jump { DestinationLabel = TargetLabel };
// new CPU.Label(LabelTrue);
// new CPUx86.Add{DestinationReg = CPUx86.Registers.ESP, SourceValue=4};
// }
// }
// }
// }
}
}

73
source2/IL2PCU/Cosmos.IL2CPU.X86/IL/Branch_Un.cs Normal file
View file

@ -0,0 +1,73 @@
using System;
using Indy.IL2CPU.Assembler;
using CPU = Indy.IL2CPU.Assembler.X86;
namespace Cosmos.IL2CPU.X86.IL
{
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Bne_Un )]
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Bge_Un )]
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Bgt_Un )]
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Ble_Un )]
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Blt_Un )]
public class Branch_Un : ILOp
{
public Branch_Un( Cosmos.IL2CPU.Assembler aAsmblr )
: base( aAsmblr )
{
}
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode )
{
var xStackContent = Assembler.StackContents.Pop();
Assembler.StackContents.Pop();
if( xStackContent.Size > 8 )
{
throw new Exception( "StackSize > 8 not supported" );
}
CPU.ConditionalTestEnum xTestOp;
switch( aOpCode.OpCode )
{
case ILOpCode.Code.Bne_Un:
xTestOp = CPU.ConditionalTestEnum.NotEqual;
break;
case ILOpCode.Code.Bge_Un:
xTestOp = CPU.ConditionalTestEnum.AboveOrEqual;
break;
case ILOpCode.Code.Bgt_Un:
xTestOp = CPU.ConditionalTestEnum.Above;
break;
case ILOpCode.Code.Ble_Un:
xTestOp = CPU.ConditionalTestEnum.BelowOrEqual;
break;
case ILOpCode.Code.Blt_Un:
xTestOp = CPU.ConditionalTestEnum.Below;
break;
default:
throw new Exception( "Unknown OpCode for conditional branch." );
break;
}
if( xStackContent.Size <= 4 )
{
new CPU.Pop { DestinationReg = CPU.Registers.EAX };
new CPU.Pop { DestinationReg = CPU.Registers.EBX };
new CPU.Compare { DestinationReg = CPU.Registers.EAX, SourceReg = CPU.Registers.EBX };
new CPU.ConditionalJump { Condition = xTestOp, DestinationLabel = AssemblerNasm.TmpBranchLabel( aMethod, aOpCode ) };
}
else
{
new CPU.Pop { DestinationReg = CPU.Registers.EAX };
new CPU.Pop { DestinationReg = CPU.Registers.EBX };
new CPU.Pop { DestinationReg = CPU.Registers.ECX };
new CPU.Pop { DestinationReg = CPU.Registers.EDX };
new CPU.Xor { DestinationReg = CPU.Registers.EAX, SourceReg = CPU.Registers.ECX };
new CPU.ConditionalJump { Condition = xTestOp, DestinationLabel = AssemblerNasm.TmpBranchLabel( aMethod, aOpCode ) };
new CPU.Xor { DestinationReg = CPU.Registers.EBX, SourceReg = CPU.Registers.EDX };
new CPU.ConditionalJump { Condition = xTestOp, DestinationLabel = AssemblerNasm.TmpBranchLabel( aMethod, aOpCode ) };
}
}
}
}