This commit is contained in:
kudzu_cp 2010-08-28 18:19:49 +00:00
parent 34aa9c7186
commit a71d09ee27
4 changed files with 30 additions and 32 deletions

View file

@ -12,6 +12,9 @@ namespace Cosmos.Core {
static internal PciBus PciBus;
static public void Init() {
// Drag this stuff in to the compiler manually until we add the always include attrib
INTs.Dummy();
CPU = new CPU();
CPU.CreateGDT();
@ -19,9 +22,6 @@ namespace Cosmos.Core {
CPU.CreateIDT(true);
CPU.InitFloat();
// Drag this stuff in to the compiler manually until we add the always include attrib
INTs.Dummy();
//Init Heap first - Hardware loads devices and they need heap
// drag in the heap:
Heap.Initialize();

View file

@ -15,7 +15,7 @@ namespace Cosmos.Core {
protected IOGroup.PIC Slave = new IOGroup.PIC(true);
protected enum Cmd {
Init = 0x11,
Init = 0x10,
EOI = 0x20
}
@ -29,50 +29,45 @@ namespace Cosmos.Core {
}
public PIC() {
Init(Master, 0x20, 4);
Init(Slave, 0x28, 2);
// MTW: to disable PIT, send 0x01 to Master mask
Init(Master, 0x20, 4, 0xFF);
Init(Slave, 0x28, 2, 0xFF);
}
protected void Init(IOGroup.PIC aPIC, byte aBase, byte aIDunno){
protected void Init(IOGroup.PIC aPIC, byte aBase, byte aIDunno, byte aMask){
// We need to remap the PIC interrupt lines to the CPU. The BIOS sets
// them in a way compatible for 16 bit mode, but in a way that causes problems
// for 32 bit mode.
// The only way to remap them however is to completely reinitialize the PICs.
byte xOldMask = Master.Data.Byte;
//#define ICW1_ICW4 0x01 /* ICW4 (not) needed */
//#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
//#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
//#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
//#define ICW1_INIT 0x10 /* Initialization - required! */
Master.Cmd.Byte = (byte)Cmd.Init | 0x01;
IOPort.Wait();
// ICW2
Master.Data.Byte = aBase;
IOPort.Wait();
// ICW3
// Somehow tells them about master/slave relationship
Master.Data.Byte = aIDunno;
IOPort.Wait();
//#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
//#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
//#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
//#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
//#define ICW4_SFNM 0x10 /* Special fully nested (not) */
byte xOldMask = Master.Data.Byte;
// outb(PIC1_COMMAND, ICW1_INIT+ICW1_ICW4); // starts the initialization sequence
Master.Cmd.Byte = (byte)Cmd.Init | 0x01;
IOPort.Wait();
Master.Data.Byte = aBase;
IOPort.Wait();
Master.Data.Byte = aIDunno;
IOPort.Wait();
// 8086/88 (MCS-80/85) mode
//0x01 8086/88 (MCS-80/85) mode
Master.Data.Byte = 0x01;
IOPort.Wait();
//// Masks - 0 = receive all IRQ's
//// MTW: to disable PIT, send 0x01 to DataPort1
//IO.PortData1.Byte = 0x01;
//IO.PortData2.Byte = 0x00;
// Restore saved masks.
Master.Data.Byte = xOldMask;
// Set mask
Master.Data.Byte = aMask;
IOPort.Wait();
}
}

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@ -6,7 +6,10 @@
<body>
<p>
<a href="http://wiki.osdev.org/PIC">http://wiki.osdev.org/PIC</a></p>
<a href="http://wiki.osdev.org/PIC">http://wiki.osdev.org/PIC</a><br />
<a href="http://wiki.osdev.org/I_Cant_Get_Interrupts_Working">
http://wiki.osdev.org/I_Cant_Get_Interrupts_Working</a><br />
</p>
<p>
APIC<br />
<a href="http://wiki.osdev.org/APIC">http://wiki.osdev.org/APIC</a><br />

View file

@ -18,11 +18,11 @@
<Framework>MicrosoftNET</Framework>
<UseInternalAssembler>False</UseInternalAssembler>
<DebugMode>Source</DebugMode>
<EnableGDB>False</EnableGDB>
<EnableGDB>True</EnableGDB>
<TraceMode>
</TraceMode>
<VMWareFlavor>Workstation</VMWareFlavor>
<StartCosmosGDB>False</StartCosmosGDB>
<StartCosmosGDB>True</StartCosmosGDB>
<TraceAssemblies>Cosmos</TraceAssemblies>
</PropertyGroup>
<PropertyGroup Condition=" '$(Configuration)' == 'Release' ">