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Added Double support to Conv_I1, Conv_I2, Conv_I4, Conv_U1, Conv_U2, Conv_U4, and Conv_U8, also fixed float conversion in those same files. (We were rounding, we needed to be truncating)

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This commit is contained in:
blah38621_cp 2011-10-01 23:03:33 +00:00
parent c134a571fa
commit 361219d23e
8 changed files with 191 additions and 122 deletions
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16
source2/IL2CPU/Cosmos.IL2CPU.Plugs/PlugAttribute.cs
View file

@ -3,11 +3,25 @@
namespace Cosmos.IL2CPU.Plugs namespace Cosmos.IL2CPU.Plugs
{ {
[AttributeUsage(AttributeTargets.Class, AllowMultiple = false, Inherited = false)] [AttributeUsage(AttributeTargets.Class, AllowMultiple = false, Inherited = false)]
public sealed class PlugAttribute : Attribute { public sealed class PlugAttribute : Attribute
{
public Type Target; public Type Target;
public bool Inheritable = false; public bool Inheritable = false;
public string TargetName; public string TargetName;
public bool IsMonoOnly = false; public bool IsMonoOnly = false;
public bool IsMicrosoftdotNETOnly = false; public bool IsMicrosoftdotNETOnly = false;
public FrameworkVersion TargetFramework = FrameworkVersion.v4_0;
}
[Flags]
public enum FrameworkVersion
{
v1_0,
v1_1,
v2_0,
v3_0,
v3_5,
v3_5_Sp1,
v4_0
} }
} }

31
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_I1.cs
View file

@ -6,43 +6,56 @@ namespace Cosmos.IL2CPU.X86.IL
/// <summary> /// <summary>
/// Convert top Stack element to sbyte and extends it to Int32. /// Convert top Stack element to sbyte and extends it to Int32.
/// </summary> /// </summary>
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Conv_I1 )] [Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_I1)]
public class Conv_I1 : ILOp public class Conv_I1 : ILOp
{ {
public Conv_I1( Cosmos.Compiler.Assembler.Assembler aAsmblr ) public Conv_I1(Cosmos.Compiler.Assembler.Assembler aAsmblr)
: base( aAsmblr ) : base(aAsmblr)
{ {
} }
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode ) public override void Execute(MethodInfo aMethod, ILOpCode aOpCode)
{ {
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
if (xSource.IsFloat) if (xSource.IsFloat)
{
if (xSource.Size == 4)
{ {
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true }; new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX }; new CPUx86.SSE.ConvertSS2SIAndTruncate { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }
else if (xSource.Size == 8)
{
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
else
{
throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_I1.cs->Unknown size of floating point value.");
}
}
switch( xSource.Size ) switch (xSource.Size)
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL }; new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL, Size = 8 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
case 8: case 8:
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL }; new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL, Size = 8 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
default: default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I1: SourceSize " + xSource + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel ); //EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I1: SourceSize " + xSource + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException(); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_I1.cs->Unknown size of variable on the top of the stack.");
} }
Assembler.Stack.Push(4, typeof(int)); Assembler.Stack.Push(4, typeof(int));
} }

33
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_I2.cs
View file

@ -6,42 +6,55 @@ namespace Cosmos.IL2CPU.X86.IL
/// <summary> /// <summary>
/// Convert top Stack element to Int16 and extends it to Int32. /// Convert top Stack element to Int16 and extends it to Int32.
/// </summary> /// </summary>
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Conv_I2 )] [Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_I2)]
public class Conv_I2 : ILOp public class Conv_I2 : ILOp
{ {
public Conv_I2( Cosmos.Compiler.Assembler.Assembler aAsmblr ) public Conv_I2(Cosmos.Compiler.Assembler.Assembler aAsmblr)
: base( aAsmblr ) : base(aAsmblr)
{ {
} }
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode ) public override void Execute(MethodInfo aMethod, ILOpCode aOpCode)
{ {
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
if (xSource.IsFloat) if (xSource.IsFloat)
{
if (xSource.Size == 4)
{ {
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true }; new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX }; new CPUx86.SSE.ConvertSS2SIAndTruncate { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }
else if (xSource.Size == 8)
{
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
else
{
throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_I2.cs->Unknown size of floating point value.");
}
}
switch( xSource.Size ) switch (xSource.Size)
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_I2.cs->The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX }; new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX, Size = 16 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
case 8: case 8:
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EBX };
new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX }; new CPUx86.MoveSignExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX, Size = 16 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
default: default:
throw new NotImplementedException( "SourceSize " + xSource + " not supported!" ); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_I2.cs->SourceSize " + xSource + " not supported!");
} }
Assembler.Stack.Push(4, typeof(Int32)); Assembler.Stack.Push(4, typeof(Int32));
} }

4
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_I4.cs
View file

@ -29,7 +29,7 @@ namespace Cosmos.IL2CPU.X86.IL
if (xSource.IsFloat) if (xSource.IsFloat)
{ {
new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true }; new CPUx86.SSE.MoveSS { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 }; new CPUx86.SSE.ConvertSS2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }
break; break;
@ -39,7 +39,7 @@ namespace Cosmos.IL2CPU.X86.IL
if (xSource.IsFloat) if (xSource.IsFloat)
{ {
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true }; new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SI { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 }; new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0 };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }

35
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_U1.cs
View file

@ -4,35 +4,48 @@ using CPUx86 = Cosmos.Compiler.Assembler.X86;
namespace Cosmos.IL2CPU.X86.IL namespace Cosmos.IL2CPU.X86.IL
{ {
/// <summary> /// <summary>
/// Convert top Stack element to UInt8 and extends it to Int32. /// Convert top Stack element to UInt8(byte) and extends it to Int32.
/// </summary> /// </summary>
[Cosmos.IL2CPU.OpCode( ILOpCode.Code.Conv_U1 )] [Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_U1)]
public class Conv_U1 : ILOp public class Conv_U1 : ILOp
{ {
public Conv_U1( Cosmos.Compiler.Assembler.Assembler aAsmblr ) public Conv_U1(Cosmos.Compiler.Assembler.Assembler aAsmblr)
: base( aAsmblr ) : base(aAsmblr)
{ {
} }
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode ) public override void Execute(MethodInfo aMethod, ILOpCode aOpCode)
{ {
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
if (xSource.IsFloat) if (xSource.IsFloat)
{
if (xSource.Size == 4)
{ {
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true }; new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX }; new CPUx86.SSE.ConvertSS2SIAndTruncate { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }
else if (xSource.Size == 8)
{
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
else
{
throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U1.cs->Unknown size of floating point value.");
}
}
switch( xSource.Size ) switch (xSource.Size)
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U1.cs->The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
{ {
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL }; new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL, Size = 8 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
} }
@ -40,13 +53,13 @@ namespace Cosmos.IL2CPU.X86.IL
{ {
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL }; new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AL, Size = 8 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
} }
default: default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I1: SourceSize " + xSource + " not supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel ); //EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_I1: SourceSize " + xSource + " not supported", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException(); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_U1.cs->Unknown size of variable on the top of the stack.");
} }
Assembler.Stack.Push(4, typeof(int)); Assembler.Stack.Push(4, typeof(int));
} }

23
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_U2.cs
View file

@ -18,33 +18,46 @@ namespace Cosmos.IL2CPU.X86.IL
{ {
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
if (xSource.IsFloat) if (xSource.IsFloat)
{
if (xSource.Size == 4)
{ {
new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true }; new CPUx86.SSE.MoveSS { SourceReg = CPUx86.Registers.ESP, DestinationReg = CPUx86.Registers.XMM0, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSS2SI { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX }; new CPUx86.SSE.ConvertSS2SIAndTruncate { SourceReg = CPUx86.Registers.XMM0, DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
} }
else if (xSource.Size == 8)
{
new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, };
new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
}
else
{
throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U2.cs->Unknown size of floating point value.");
}
}
switch( xSource.Size ) switch( xSource.Size )
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U2.cs->The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX }; new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX, Size = 16 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
case 8: case 8:
{ {
new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.ECX };
new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX }; new CPUx86.MoveZeroExtend { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.AX, Size = 16 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX }; new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break; break;
} }
default: default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U2: SourceSize " + xSource + " not yet supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel ); //EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U2: SourceSize " + xSource + " not yet supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException(); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_U2.cs->Unknown size of variable on the top of the stack.");
} }
Assembler.Stack.Push(Align(4, 4), typeof(int)); Assembler.Stack.Push(Align(4, 4), typeof(int));
} }

18
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_U4.cs
View file

@ -16,15 +16,12 @@ namespace Cosmos.IL2CPU.X86.IL
public override void Execute( MethodInfo aMethod, ILOpCode aOpCode ) public override void Execute( MethodInfo aMethod, ILOpCode aOpCode )
{ {
// todo: WARNING: not implemented correctly!
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
switch( xSource.Size ) switch( xSource.Size )
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U4.cs->The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
if (xSource.IsFloat) if (xSource.IsFloat)
{ {
@ -36,10 +33,13 @@ namespace Cosmos.IL2CPU.X86.IL
case 8: case 8:
if (xSource.IsFloat) if (xSource.IsFloat)
{ {
throw new Exception("conv.u4"); new CPUx86.SSE.MoveDoubleAndDupplicate { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true };
//new CPUx86.SSE.MoveSD { DestinationReg = CPUx86.Registers.XMM0, SourceReg = CPUx86.Registers.ESP, SourceIsIndirect = true }; new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, };
//new CPUx86.SSE.ConvertSD2SIAndTruncate { DestinationReg = CPUx86.Registers.EAX, SourceReg = CPUx86.Registers.XMM0, }; new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true };
//new CPUx86.Move { DestinationReg = CPUx86.Registers.ESP, SourceReg = CPUx86.Registers.EAX, DestinationIsIndirect = true }; new CPUx86.Pop { DestinationReg = CPUx86.Registers.EAX };
new CPUx86.Add { DestinationReg = CPUx86.Registers.ESP, SourceValue = 4 };
new CPUx86.Push { DestinationReg = CPUx86.Registers.EAX };
break;
} }
else else
{ {
@ -50,7 +50,7 @@ namespace Cosmos.IL2CPU.X86.IL
} }
default: default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U4: SourceSize " + xStackItem.Size + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel ); //EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U4: SourceSize " + xStackItem.Size + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException(); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_U4.cs->Unknown size of variable on the top of the stack.");
} }
Assembler.Stack.Push(Align(4, 4), typeof(Int32)); Assembler.Stack.Push(Align(4, 4), typeof(Int32));
} }

17
source2/IL2CPU/Cosmos.IL2CPU.X86/IL/Conv_U8.cs
View file

@ -7,19 +7,21 @@ namespace Cosmos.IL2CPU.X86.IL
/// Convert top Stack element to UInt64 and change its type to Int64. /// Convert top Stack element to UInt64 and change its type to Int64.
/// </summary> /// </summary>
[Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_U8)] [Cosmos.IL2CPU.OpCode(ILOpCode.Code.Conv_U8)]
public class Conv_U8: ILOp public class Conv_U8 : ILOp
{ {
public Conv_U8(Cosmos.Compiler.Assembler.Assembler aAsmblr):base(aAsmblr) public Conv_U8(Cosmos.Compiler.Assembler.Assembler aAsmblr)
: base(aAsmblr)
{ {
} }
public override void Execute(MethodInfo aMethod, ILOpCode aOpCode) { public override void Execute(MethodInfo aMethod, ILOpCode aOpCode)
{
var xSource = Assembler.Stack.Pop(); var xSource = Assembler.Stack.Pop();
switch( xSource.Size ) switch (xSource.Size)
{ {
case 1: case 1:
case 2: case 2:
throw new Exception("The size {0:D} could not exist, because always is pushed Int32 or Int64!"); throw new Exception("Cosmos.IL2CPU.x86->IL->Conv_U8.cs->The size {0:D} could not exist, because always is pushed Int32 or Int64!");
case 4: case 4:
{ {
if (xSource.IsFloat) if (xSource.IsFloat)
@ -42,13 +44,14 @@ namespace Cosmos.IL2CPU.X86.IL
{ {
new CPUx86.x87.FloatLoad { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true }; new CPUx86.x87.FloatLoad { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true };
new CPUx86.x87.FloatABS(); new CPUx86.x87.FloatABS();
new CPUx86.x87.IntStoreAndPop { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true }; new CPUx86.x87.IntStoreWithTrunc { DestinationReg = Registers.ESP, Size = 64, DestinationIsIndirect = true };
} }
//Else it's already an Int64, or UInt64
break; break;
} }
default: default:
//EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U8: SourceSize " + xSource + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel ); //EmitNotImplementedException( Assembler, GetServiceProvider(), "Conv_U8: SourceSize " + xSource + " not supported!", mCurLabel, mMethodInformation, mCurOffset, mNextLabel );
throw new NotImplementedException(); throw new NotImplementedException("Cosmos.IL2CPU.x86->IL->Conv_U8.cs->Unknown size of variable on the top of the stack.");
} }
Assembler.Stack.Push(Align(8, 4), typeof(Int64)); Assembler.Stack.Push(Align(8, 4), typeof(Int64));
} }